AD5174BRMZ-10-RL7【PDF 8/20 页】IC DGTL POT 1024POS 10K 10MSOP

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AD5174

Rev. B | Page 16 of 20

RDAC ARCHITECTURE

To achieve optimum performance, Analog Devices, Inc., has

patented the RDAC segmentation architecture for all the digital

potentiometers. In particular, the AD5174 employs a three-stage

segmentation approach as shown in Figure 27. The AD5174

wiper switch is designed with the transmission gate CMOS

topology.

10-BIT

ADDRESS

DECODER

Figure 27. Simplified RDAC Circuit

PROGRAMMING THE VARIABLE RESISTOR

Rheostat Operation

The nominal resistance between Terminal W and Terminal A,

RWA, is 10 kΩ and has 1024-tap points accessed by the wiper ter-

minal. The 10-bit data in the RDAC latch is decoded to select

one of the 1024 possible wiper settings. As a result, the general

equation for determining the digitally programmed output

resistance between the W terminal and the A terminal is

1024

)

(

(1)

where:

is the decimal equivalent of the binary code loaded in the

10-bit RDAC register.

RWA

is the end-to-end resistance.

In the zero-scale condition, a finite total wiper resistance of

120 Ω is present. Regardless of which setting the part is oper-

ating in, take care to limit the current between Terminal A and

Terminal W to the maximum continuous current of ±6 mA or

a pulse current specified in Table 3. Otherwise, degradation or

possible destruction of the internal switch contact may occur.

Calculate the Actual End-to-End Resistance

The resistance tolerance is stored in the internal memory

during factory testing. The actual end-to-end resistance can,

therefore, be calculated (which is valuable for calibration,

tolerance matching, and precision applications).

The resistance tolerance (in percentage) is stored in fixed-point

format, using a 16-bit sign magnitude binary. The sign bit(0 =

negative and 1 = positive) and the integer part is located in

Address 0x39 as shown in Table 10. Address 0x3A contains the

fractional part as shown in Table 12.

That is, if the data readback from Address 0x39 is 0000001010 and

data from Address 0x3A is 0010110000, then the end-to-end

resistance can be calculated as follows.

For Memory Location 0x39,

DB[9:8]: XX = don’t care

DB[7]: 0 = negative

DB[6:0]: 0001010 = 10

For Memory Location 0x3A,

DB[9:8]: XX = don’t care

DB[7:0]: 10110000 = 176 × 28 = 0.6875

Therefore, tolerance = 10.6875% and RWA (1023)= 8.931 kΩ.

Table 12. End-to-End Resistance Tolerance Bytes

Data Byte1

Memory Map Address

DB9

DB8

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

0x39

Sign

0x3A

1 X is don’t care.

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